COMPSYS 701 Advanced Digital Systems Design - Course Outlines

Course Prescription

Advanced concepts in digital design including: System-on-Chip (system level description, behavioural and register-transfer descriptions); advanced modelling techniques and design flows; design space exploration and optimisation; hardware-software partitioning and trade-offs; component reusability; reconfigurable systems; low-power systems; case studies (speech, image, video algorithms implementation, application specific processor design); individual research projects to analyse the problem, model and implement the required hardware-software components.

Course Overview

This is an advanced, research-oriented and project-based course with extensive hands-on experience.

Increasing design complexity and advances in semiconductor technology provide the opportunity to have all parts of a digital system as a System on a Chip (SOC), where parts of system functionality are developed as software and parts as hardware following Hardware/Software partitioning paradigm. Also, it is necessary to be able to design, re-use and exchange Intellectual Property (IP) (both hardware and software) in a systematic, reliable and easy way. Therefore, advanced methodologies and tools are needed on a system-level for digital system design, validation and verification at different levels of abstraction. System-level design can help cope with the growing complexity of both the hardware and software. While software design is based on the use of high-level programming languages with design cycle that allows relatively easy and quick modifications and revisions, hardware design deals with much lower level of abstraction and requires specific design expertise, including the knowledge of the architecture on which hardware will be mapped and implemented. This results in achieving shorter time to market for systems in addition to providing better opportunities for quality system design and verification.

As most of the designs require final synthesizable design representation, hardware description languages, such as VHDL and Verilog, are most often used for the final design. A refresher of VHDL and register-transfer level design will be made in this course and then the language will be used to target relatively complex designs, such as complete processor or heterogeneous multi-core SoC, on one hand, or behaviourally specified algorithms, on the other hand. Both these directions of digital systems design will be further analysed and their use in real designs demonstrated. This includes using FPGAs as the target implementation technology that allows the development of specialised reconfigurable chips. Also, aspects of the synthesis from the high level specifications (High-Level Synthesis, HLS) using programming language inputs and their synthesis into hardware accelerators or application-specific processors will be discussed.

The course is completely assessed by the coursework. Assessment of the work on project is through a number of checkpoints and final report and presentation in the class.

Course Requirements

Prerequisite: COMPSYS 305

Learning Outcomes

By the end of this course, students will be able to:

Understand and apply techniques for modelling complex digital systems at different levels of abstraction and trade-off between the accuracy of the model and simulation speed (Capability 4.1, 5.1 and 8.2)
Analyse and use main concepts in digital systems design which include techniques such as parallelism, pipelining, resource sharing and scheduling to achieve the required level of performance based on the specified design constraints (Capability 5.1)
Use electronic design automation (EDA) tools and hardware description language (VHDL) to employ advanced techniques to design a complex digital system for FPGA implementation (Capability 3.2 and 5.1)
Apply advanced techniques to satisfy resource and timing constraints in FPGA based systems especially timing closure of complex digital systems (Capability 3.1)
Understand and apply the optimisation techniques for application specific systems implemented as Multiprocessor System on Chip (MPSoC) (Capability 4.1)
Analyse the research trends and do research in the area of complex digital systems and systems on chip using a selected case study (Capability 4.1 and 5.1)

Assessments

Assessment Type	Percentage	Classification
Project 1	30%	Group Coursework
Assignments	40%	Group & Individual Coursework
Project 2	30%	Group Coursework
3 types	100%

Assessment Type	Learning Outcome Addressed
	1	2	3	4	5	6
Project 1
Assignments
Project 2

A passing mark is 50% for the course, according to the University policy.

All assessments are compulsory for all students and DNC for the course will be awarded if the student has not completed labs and not submitted the deliverable for any component (assignment or project) as required. The details of each assessment and requirements will be given via course page on Canvas.

By default late submissions are not allowed, unless specific late submission penalties are released on Canvas.

Workload Expectations

This course is a standard 15 point course and students are expected to spend 10 hours per week on average involved in each 15 point course that they are enrolled in. This includes study break weeks.

For each week in this course, you can expect 2 hours of lectures, one hour of tutorial and/or labs, and the remaining hours are supposed to be used for reading, thinking, designing parts of the systems, writing reports and demonstrating your solutions to the class.

Delivery Mode

Campus Experience

Attendance is required at scheduled activities including labs to complete components of the course.
Lectures will be available as recordings. Other learning activities including labs will not be available as recordings.
The course will not include live online events.
Attendance on campus is also required for project assessments.
The activities for the course are scheduled as a standard weekly timetable.

Learning Resources

Course materials are made available in a learning and collaboration tool called Canvas which also includes reading lists and lecture recordings (where available).

Please remember that the recording of any class on a personal device requires the permission of the instructor.

The lectures are accompanied with lecture slides and additional reading materials delivered via Canvas. The tools for designing digital systems are provided on lab computers or offered to students to download via Canvas or other appropriate medium.

Health & Safety

Health and safety conditions when using MDLS and/or ECSE research labs require certificate of passing induction training. Students must ensure they are familiar with their Health and Safety responsibilities, as described in the university's Health and Safety policy

Student Feedback

At the end of every semester students will be invited to give feedback on the course and teaching through a tool called SET or Qualtrics. The lecturers and course co-ordinators will consider all feedback and respond with summaries and actions.

Your feedback helps teachers to improve the course and its delivery for future students.

Class Representatives in each class can take feedback to the department and faculty staff-student consultative committees.

Every year student feedback is used by the teaching team to make further refinements and improvements of the projects that are used for the assessment. According to 2024 SET results (which are based on very limited number of students' responses) we plan to change sequence of labs, assignments and project requirements and make them more natural for less able students. Final results in the course in 2024 are much better than what it looks from the SET evaluations and it indicates that most likely less able students contributed to SET evaluations.

Other Information

While official prerequisite is COMPSYS 305 (Digital Systems Design), other courses with equivalent content are also acceptable (must contain design using Hardware Description Language). Knowledge of programming in traditional programming language, such as C/C++, Java, Python, and basics of computer architecture are advantageous.

Academic Integrity

The University of Auckland will not tolerate cheating, or assisting others to cheat, and views cheating in coursework, tests and examinations as a serious academic offence. The work that a student submits for grading must be the student's own work, reflecting their learning. Where work from other sources is used, it must be properly acknowledged and referenced. A student's assessed work may be reviewed against electronic source material using computerised detection mechanisms. Upon reasonable request, students may be required to provide an electronic version of their work for computerised review.

Class Representatives

Class representatives are students tasked with representing student issues to departments, faculties, and the wider university. If you have a complaint about this course, please contact your class rep who will know how to raise it in the right channels. See your departmental noticeboard for contact details for your class reps.

Inclusive Learning

All students are asked to discuss any impairment related requirements privately, face to face and/or in written form with the course coordinator, lecturer or tutor.

Student Disability Services also provides support for students with a wide range of impairments, both visible and invisible, to succeed and excel at the University. For more information and contact details, please visit the Student Disability Services’ website http://disability.auckland.ac.nz

Special Circumstances

If your ability to complete assessed coursework is affected by illness or other personal circumstances outside of your control, contact a member of teaching staff as soon as possible before the assessment is due.

If your personal circumstances significantly affect your performance, or preparation, for an exam or eligible written test, refer to the University’s aegrotat or compassionate consideration page https://www.auckland.ac.nz/en/students/academic-information/exams-and-final-results/during-exams/aegrotat-and-compassionate-consideration.html.

This should be done as soon as possible and no later than seven days after the affected test or exam date.

Learning Continuity

In the event of an unexpected disruption we undertake to maintain the continuity and standard of teaching and learning in all your courses throughout the year. If there are unexpected disruptions the University has contingency plans to ensure that access to your course continues and your assessment is fair, and not compromised. Some adjustments may need to be made in emergencies. You will be kept fully informed by your course co-ordinator, and if disruption occurs you should refer to the University Website for information about how to proceed.

Student Charter and Responsibilities

The Student Charter assumes and acknowledges that students are active participants in the learning process and that they have responsibilities to the institution and the international community of scholars. The University expects that students will act at all times in a way that demonstrates respect for the rights of other students and staff so that the learning environment is both safe and productive. For further information visit Student Charter https://www.auckland.ac.nz/en/students/forms-policies-and-guidelines/student-policies-and-guidelines/student-charter.html.

Disclaimer

Elements of this outline may be subject to change. The latest information about the course will be available for enrolled students in Canvas.

In this course you may be asked to submit your coursework assessments digitally. The University reserves the right to conduct scheduled tests and examinations for this course online or through the use of computers or other electronic devices. Where tests or examinations are conducted online remote invigilation arrangements may be used. The final decision on the completion mode for a test or examination, and remote invigilation arrangements where applicable, will be advised to students at least 10 days prior to the scheduled date of the assessment, or in the case of an examination when the examination timetable is published.

Capability 3:	Knowledge and Practice
Capability 4:	Critical Thinking
Capability 5:	Solution Seeking
Capability 8:	Ethics and Professionalism

COMPSYS 701 : Advanced Digital Systems Design

Engineering

2025 Semester One (1253) (15 POINTS)